STMicroelectronics and Soitec to collaborate on silicon carbide substrates
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Update time : 2022-12-03 11:13:56
STMicroelectronics (NASDAQ: STM) and French semiconductor materials major Soitec announced on Dec. 1 that they will collaborate on the next phase of silicon carbide substrates. STMicroelectronics plans to qualify Soitec's silicon carbide substrate technology over the next 18 months. The goal of this collaboration is for ST to use Soitec's SmartSiCTM technology for its future 200mm substrate manufacturing, to support its device and module manufacturing business, and to achieve volume production in the mid-term.
As our automotive and industrial customers accelerate the transition to electrification of their systems and products, our transition to 200mm silicon carbide wafers will give them a huge advantage," said Marco Monti, president of ST's Automotive and Discrete Group. In addition, product volumes have increased. Therefore, this is significant in driving economies of scale."
Soitec COO Bernard Aspar said, "The advent of electric vehicles has disrupted the automotive industry. Our cutting-edge SmartSiCTM technology will enable the company's unique SmartCutTM process to be applied to silicon carbide semiconductors, which will facilitate accelerated adoption of these technologies. The combination of the company's SmartSiCTM substrate with ST's industry-leading SiC technology and expertise will be a game changer in automotive chip manufacturing and will set new standards.
SiC is a disruptive compound semiconductor material with intrinsic properties that provide superior performance and efficiency to silicon in critical, high-growth power applications such as electric vehicles and industrial processes. It enables more efficient power conversion, lighter, more compact designs, and overall system design cost savings, which are key parameters and factors in the success of automotive and industrial systems.
The transition from 6-inch wafers to 8-inch wafers will dramatically increase capacity, boosting the useful area for manufacturing integrated circuits by almost two times and allowing 1.8-1.9 times more working chips per wafer.
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